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AT86RF232
Additional internal trimming capacitors C TRIM are available. Any value in the range from
0pF to 4.5pF with a 0.3pF resolution is selectable using XTAL_TRIM of register 0x12
(XOSC_CTRL). To calculate the total load capacitance, the following formula can be
used
C L [pF] = 0.5 x (CX + C TRIM + C PAR ).
The Atmel AT86RF232 trimming capacitors provide the possibility of reducing
frequency deviations caused by production process variations or by external
components tolerances. Note that the oscillation frequency can only be reduced by
increasing the trimming capacitance. The frequency deviation caused by one step of
C TRIM decreases with increasing crystal load capacitor values.
An amplitude control circuit is included to ensure stable operation under different
operating conditions and for different crystal types. Enabling the crystal oscillator in
P_ON state and after leaving SLEEP state causes a slightly higher current during the
amplitude build-up phase to guarantee a short start-up time. At stable operation, the
current is reduced to the amount necessary for a robust operation. This also keeps the
drive level of the crystal low.
Generally, crystals with a higher load capacitance are less sensitive to parasitic pulling
effects caused by external component variations or by variations of board and circuit
parasitic. On the other hand, a larger crystal load capacitance results in a longer start-
up time and a higher steady state current consumption.
9.6.3 External Reference Frequency Setup
When using an external reference frequency, the signal must be connected to
pin 26 (XTAL1) as indicated in Figure 9-12 and the register bits XTAL_MODE
(register 0x12, XOSC_CTRL) need to be set to the external oscillator mode for power
saving reasons. The oscillation peak-to-peak amplitude shall be between 100mV and
500mV, the optimum range is between 400mV and 500mV. Pin 25 (XTAL2) should not
be wired. It is possible, among other waveforms, to use sine and square wave signals.
Note:
1. The quality of the external reference (that is phase noise) determines the
system performance.
Figure 9-12. Setup for Using an External Frequency Reference.
16MHz
XTAL1
XTAL2
PCB
AT86RF232
9.6.4 Master Clock Signal Output (CLKM)
The generated reference clock signal can be fed to a microcontroller using
pin 17 (CLKM). The internal 16MHz raw clock can be divided by an internal prescaler.
Thus, clock frequencies of 1MHz or 62.5kHz can be supplied by pin 17 (CLKM).
The CLKM frequency is configurable using register 0x03 (TRX_CTRL_0). There are two
possibilities to change the CLKM frequency. If CLKM_SHA_SEL = 0, changing the
register bits CLKM_CTRL (register 0x03, TRX_CTRL_0) immediately affects a glitch
115
8321A – MCU Wireless – 10/11
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